[MAN] llvm-rtdyld-6

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LLVM-RTDYLD

Section: User Commands (1)
Updated: April 2018
Index Return to Main Contents

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NAME

llvm-rtdyld - manual page for llvm-rtdyld 6.0  

DESCRIPTION

OVERVIEW: llvm MC-JIT tool

USAGE: llvm-rtdyld [options] <input file>

OPTIONS:

General options:

-aarch64-neon-syntax - Choose style of NEON code to emit from AArch64 backend:

=generic

- Emit generic NEON assembly

=apple

- Emit Apple-style NEON assembly

-amdgpu-dump-hsa-metadata - Dump AMDGPU HSA Metadata

-amdgpu-enable-merge-m0 - Merge and hoist M0 initializations

-amdgpu-sdwa-peephole - Enable SDWA peepholer

-amdgpu-spill-sgpr-to-smem - Use scalar stores to spill SGPRs if supported by subtarget

-amdgpu-verify-hsa-metadata - Verify AMDGPU HSA Metadata

-amdgpu-vgpr-index-mode - Use GPR indexing mode instead of movrel for vector indexing

-arm-add-build-attributes -

-arm-implicit-it - Allow conditional instructions outdside of an IT block

=always

- Accept in both ISAs, emit implicit ITs in Thumb

=never

- Warn in ARM, reject in Thumb

=arm

- Accept in ARM, reject in Thumb

=thumb

- Warn in ARM, emit implicit ITs in Thumb

-atomic-counter-update-promoted - Do counter update using atomic fetch add

for promoted counters only

-bounds-checking-single-trap - Use one trap block per function

-check=<string> - File containing RuntimeDyld verifier checks.

-color - use colored syntax highlighting (default=autodetect)

-cost-kind - Target cost kind

=throughput

- Reciprocal throughput

=latency

- Instruction latency

=code-size

- Code size

-cvp-dont-process-adds -

-debug-counter - Comma separated list of debug counter skip and count

=predicateinfo-rename

- Controls which variables are renamed with predicateinfo

=instcombine-visit

- Controls which instructions are visited

=newgvn-vn

- Controls which instructions are value numbered

=newgvn-phi

- Controls which instructions we create phi of ops for

-do-counter-promotion - Do counter register promotion

-dylib=<string> - Add library.

-enable-load-pre -

-enable-name-compression - Enable name string compression

-enable-packed-inlinable-literals - Enable packed inlinable literals (v2f16, v2i16)

-enable-si-insert-waitcnts - Use new waitcnt insertion pass

-entry=<string> - Function to call as entry point.

Action to perform:

-execute - Load, link, and execute the inputs.

-printline - Load, link, and print line information for each function.

-printdebugline - Load, link, and print line information for each function using the debug object

-printobjline - Like -printlineinfo but does not load the object first

-verify - Load, link and verify the resulting memory image.

-expensive-combines - Enable expensive instruction combines

-gpsize=<uint> - Global Pointer Addressing Size.

The default size is 8.

-hash-based-counter-split - Rename counter variable of a comdat function based on cfg hash

-import-all-index - Import all external functions in index.

-instcombine-maxarray-size=<uint> - Maximum array size considered when doing a combine

-internalize-public-api-file=<filename> - A file containing list of symbol names to preserve

-internalize-public-api-list=<list> - A list of symbol names to preserve

-iterative-counter-promotion - Allow counter promotion across the whole loop nest.

-lto-pass-remarks-output=<filename> - Output filename for pass remarks

-max-counter-promotions=<int> - Max number of allowed counter promotions

-max-counter-promotions-per-loop=<uint> - Max number counter promotions per loop to avoid increasing register pressure too much

-mcpu=<cpu-name> - Target a specific cpu type (-mcpu=,help/ for details)

-memop-size-large=<uint> - Set large value thresthold in memory intrinsic size profiling. Value of 0 disables the large value profiling.

-memop-size-range=<string> - Set the range of size in memory intrinsic calls to be profiled precisely, in a format of <start_val>:<end_val>

-merror-missing-parenthesis - Error for missing parenthesis around predicate registers

-merror-noncontigious-register - Error for register names that aren't contigious

-mhvx - Enable Hexagon Vector eXtensions

=v60

- Build for HVX v60

=v62

- Build for HVX v62

=v65

- Build for HVX v65

=

-

-mips-compact-branches - MIPS Specific: Compact branch policy.

=never

- Do not use compact branches if possible.

=optimal

- Use compact branches where appropiate (default).

=always

- Always use compact branches if possible.

-mips16-constant-islands - Enable mips16 constant islands.

-mips16-hard-float - Enable mips16 hard float.

-mno-compound - Disable looking for compound instructions for Hexagon

-mno-fixup - Disable fixing up resolved relocations for Hexagon

-mno-ldc1-sdc1 - Expand double precision loads and stores to their single precision counterparts

-mno-pairing - Disable looking for duplex instructions for Hexagon

-mwarn-missing-parenthesis - Warn for missing parenthesis around predicate registers

-mwarn-noncontigious-register - Warn for register names that arent contigious

-mwarn-sign-mismatch - Warn for mismatching a signed and unsigned value

-no-discriminators - Disable generation of discriminator information.

-nvptx-sched4reg - NVPTX Specific: schedule for register pressue

-preallocate - Allocate memory upfront rather than on-demand

-print-module-scope - When printing IR for print-[before|after]{-all} always print a module IR

-r600-ir-structurize - Use StructurizeCFG IR pass

-rdf-dump -

-rdf-limit=<uint> -

-safepoint-ir-verifier-print-only -

-sample-profile-check-record-coverage=<N> - Emit a warning if less than N% of records in the input profile are matched to the IR.

-sample-profile-check-sample-coverage=<N> - Emit a warning if less than N% of samples in the input profile are matched to the IR.

-sample-profile-inline-hot-threshold=<N> - Inlined functions that account for more than N% of all samples collected in the parent function, will be inlined again.

-sample-profile-max-propagate-iterations=<uint> - Maximum number of iterations to go through when propagating sample block/edge weights through the CFG.

-speculative-counter-promotion-max-exiting=<uint> - The max number of exiting blocks of a loop to allow

speculative counter promotion

-speculative-counter-promotion-to-loop - When the option is false, if the target block is in a loop, the promotion will be disallowed unless the promoted counter

update can be further/iteratively promoted into an acyclic region.

-summary-file=<string> - The summary file to use for function importing.

-threads=<int> -

-triple=<string> - Target triple for disassembler

-unfold-element-atomic-memcpy-max-elements=<uint> - Maximum number of elements in atomic memcpy the optimizer is allowed to unfold

-verify-region-info - Verify region info (time consuming)

-vp-counters-per-site=<number> - The average number of profile counters allocated per value profiling site.

-vp-static-alloc - Do static counter allocation for value profiler

Generic Options:

-help - Display available options (-help-hidden for more)

-help-list - Display list of available options (-help-list-hidden for more)

-version - Display the version of this program

 

SEE ALSO

The full documentation for llvm-rtdyld is maintained as a Texinfo manual. If the info and llvm-rtdyld programs are properly installed at your site, the command

info llvm-rtdyld

should give you access to the complete manual.

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Index

NAME

DESCRIPTION

SEE ALSO

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Time: 04:45:27 GMT, September 16, 2022